/**
 * Copyright (C) 2024 Intel Corporation
 *
 * Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file
 * except in compliance with the License.  You may obtain a copy of the License at
 *
 * http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software distributed under the
 * License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
 * either express or implied.  See the License for the specific language governing permissions
 * and limitations under the License.
 *
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#ifndef BACKENDS_TOFINO_BF_ASM_CONSTANTS_H_
#define BACKENDS_TOFINO_BF_ASM_CONSTANTS_H_

enum {
    /* global constants related to MAU stage */
    LOGICAL_TABLES_PER_STAGE = 16,
    PHYSICAL_TABLES_PER_STAGE = 16,
    TCAM_TABLES_PER_STAGE = 8,
    SRAM_ROWS = 8,
    LOGICAL_SRAM_ROWS = 16,
    SRAM_UNITS_PER_ROW = 12,
    MAPRAM_UNITS_PER_ROW = 6,
    MEM_WORD_WIDTH = 128,
    SRAM_DEPTH_BITS = 10,
    SRAM_DEPTH = 1 << SRAM_DEPTH_BITS,
    LAMB_DEPTH_BITS = 6,
    LAMB_DEPTH = 1 << LAMB_DEPTH_BITS,
    TCAM_ROWS = 12,
    TCAM_UNITS_PER_ROW = 2,
    TCAM_XBAR_GROUPS = 12,
    TCAM_XBAR_GROUP_SIZE = 44,
    TCAM_XBAR_INPUT_BYTES = 68,
    TCAM_VPN_BITS = 6,
    TCAM_WORD_BITS = 9,
    TCAM_FORMAT_WIDTH = 47,
    TCAM_PAYLOAD_BITS = 1,
    TCAM_PAYLOAD_BITS_START = 0,
    TCAM_MATCH_BITS_START = TCAM_PAYLOAD_BITS_START + TCAM_PAYLOAD_BITS,
    TCAM_PARITY_BITS = 2,
    TCAM_PARITY_BITS_START = 45,
    TCAM_VERSION_BITS = 2,
    TCAM_VERSION_BITS_START = 43,
    EXACT_XBAR_GROUPS = 8,
    EXACT_XBAR_GROUP_SIZE = 128,
    BYTE_XBAR_GROUPS = 8,
    BYTE_XBAR_GROUP_SIZE = 8,
    GALOIS_FIELD_MATRIX_COLUMNS = 52,
    EXACT_HASH_GROUP_SIZE = 52,
    EXACT_HASH_ADR_BITS = 10,
    EXACT_HASH_ADR_GROUPS = 5,
    EXACT_HASH_SELECT_BITS = 12,
    EXACT_HASH_FIRST_SELECT_BIT = EXACT_HASH_GROUP_SIZE - EXACT_HASH_SELECT_BITS,
    EXACT_VPN_BITS = 9,
    EXACT_WORD_BITS = 10,
    NEXT_TABLE_MAX_RAM_EXTRACT_BITS = 8,
    MAX_LONGBRANCH_TAGS = 8,
    MAX_IMMED_ACTION_DATA = 32,
    ACTION_DATA_8B_SLOTS = 16,
    ACTION_DATA_16B_SLOTS = 24,
    ACTION_DATA_32B_SLOTS = 16,
    ACTION_DATA_BUS_SLOTS = ACTION_DATA_8B_SLOTS + ACTION_DATA_16B_SLOTS + ACTION_DATA_32B_SLOTS,
    ACTION_DATA_BUS_BYTES =
        ACTION_DATA_8B_SLOTS + 2 * ACTION_DATA_16B_SLOTS + 4 * ACTION_DATA_32B_SLOTS,
    ACTION_HV_XBAR_SLICES = 8,
    ACTION_HV_XBAR_SLICE_SIZE = 16,
    ACTION_INSTRUCTION_SUCCESSOR_TABLE_DEPTH = 8,
    ACTION_INSTRUCTION_ADR_ENABLE = 0x40,
    ACTION_IMEM_SLOTS = 32,
    ACTION_IMEM_COLORS = 2,
    ACTION_IMEM_ADDR_MAX = ACTION_IMEM_SLOTS * ACTION_IMEM_COLORS,
    ACTION_ALWAYS_RUN_IMEM_ADDR = 63,
    SELECTOR_PORTS_PER_WORD = 120,
    STATEFUL_PREDICATION_ENCODE_NOOP = 0,
    STATEFUL_PREDICATION_ENCODE_NOTCMPHI = 3,
    STATEFUL_PREDICATION_ENCODE_NOTCMPLO = 5,
    STATEFUL_PREDICATION_ENCODE_CMPLO = 0xaaaa,
    STATEFUL_PREDICATION_ENCODE_CMPHI = 0xcccc,
    STATEFUL_PREDICATION_ENCODE_CMP0 = 0xaaaa,
    STATEFUL_PREDICATION_ENCODE_CMP1 = 0xcccc,
    STATEFUL_PREDICATION_ENCODE_CMP2 = 0xf0f0,
    STATEFUL_PREDICATION_ENCODE_CMP3 = 0xff00,
    STATEFUL_PREDICATION_ENCODE_UNCOND = 0xffff,
    STATEFUL_PREDICATION_OUTPUT = 6,
    // See bf-drivers/include/pipe_mgr/pipe_mgr_intf.h for the definitions
    TYPE_ENUM_SHIFT = 24,
    PIPE_ID_SHIFT = 28,
    REGISTER_PARAM_HANDLE_START = (0x08 << TYPE_ENUM_SHIFT),
    ACTION_HANDLE_START = (0x20 << TYPE_ENUM_SHIFT),
    FIELD_HANDLE_START = (0x9 << TYPE_ENUM_SHIFT),
    PER_FLOW_ENABLE_BITS = 1,
    METER_TYPE_BITS = 3,
    // Order is METER_TYPE, METER_PFE, METER_ADDRESS
    METER_TYPE_START_BIT = 24,
    METER_LOWER_HUFFMAN_BITS = 7,
    METER_ADDRESS_BITS = 23,
    METER_FULL_ADDRESS_BITS = METER_ADDRESS_BITS + PER_FLOW_ENABLE_BITS + METER_TYPE_BITS,
    METER_ADDRESS_ZERO_PAD = 23,
    METER_PER_FLOW_ENABLE_START_BIT = 23,
    IDLETIME_BUSSES = 20,
    IDLETIME_BUSSES_PER_HALF = IDLETIME_BUSSES / 2,
    IDLETIME_ADDRESS_PER_FLOW_ENABLE_START_BIT = 20,
    IDLETIME_ADDRESS_BITS = 20,
    IDLETIME_FULL_ADDRESS_BITS = IDLETIME_ADDRESS_BITS + PER_FLOW_ENABLE_BITS,
    IDLETIME_ADDRESS_ZERO_PAD = 4,
    IDLETIME_HUFFMAN_BITS = 4,
    SELECTOR_METER_TYPE_START_BIT = METER_TYPE_START_BIT,
    SELECTOR_LOWER_HUFFMAN_BITS = METER_LOWER_HUFFMAN_BITS,
    SELECTOR_METER_ADDRESS_BITS = METER_ADDRESS_BITS,
    SELECTOR_PER_FLOW_ENABLE_START_BIT = METER_PER_FLOW_ENABLE_START_BIT,
    SELECTOR_VHXBAR_HASH_BUS_INDEX = 3,
    SELECTOR_LENGTH_MOD_BITS = 5,
    STAT_ADDRESS_BITS = 19,
    STAT_FULL_ADDRESS_BITS = STAT_ADDRESS_BITS + PER_FLOW_ENABLE_BITS,
    STAT_ADDRESS_ZERO_PAD = 7,
    STAT_METER_COLOR_LOWER_HUFFMAN_BITS = 3,
    STATISTICS_PER_FLOW_ENABLE_START_BIT = 19,
    STATISTICS_PER_FLOW_SHIFT_COUNT = 7,
    ACTION_ADDRESS_ZERO_PAD = 5,
    ACTION_ADDRESS_BITS = 22,
    ACTION_FULL_ADDRESS_BITS = 23,
    ACTION_DATA_PER_FLOW_ENABLE_START_BIT = ACTION_ADDRESS_BITS,
    ACTION_DATA_LOWER_HUFFMAN_BITS = 5,
    ACTION_DATA_UPPER_HUFFMAN_BITS = 2,
    ACTION_DATA_HUFFMAN_BITS = ACTION_DATA_LOWER_HUFFMAN_BITS + ACTION_DATA_UPPER_HUFFMAN_BITS,
    ACTION_DATA_HUFFMAN_DIFFERENCE = 10,
    MAX_PORTS = 288,
    MAX_LRT_ENTRIES = 3,
    UPPER_MATCH_CENTRAL_FIRST_ROW = SRAM_ROWS / 2,
    UPPER_MATCH_CENTRAL_FIRST_LOGICAL_ROW = UPPER_MATCH_CENTRAL_FIRST_ROW * 2,
    CHECKSUM_ENGINE_PHVID_TOFINO_LOW = 224,
    CHECKSUM_ENGINE_PHVID_TOFINO_HIGH = 235,
    CHECKSUM_ENGINE_PHVID_TOFINO_PER_GRESS = 6,
    CONSTANTS_PHVID_JBAY_LOW = 224,
    CONSTANTS_PHVID_JBAY_HIGH = 232,
};

enum METER_ACCESS_TYPE {
    NOP = 0,
    METER_LPF_COLOR_BLIND = 2,
    METER_SELECTOR = 4,
    METER_COLOR_AWARE = 6,
    STATEFUL_INSTRUCTION_0 = 1,
    STATEFUL_INSTRUCTION_1 = 3,
    STATEFUL_INSTRUCTION_2 = 5,
    STATEFUL_INSTRUCTION_3 = 7,
    METER_COLOR_ACCESS = -1  // special for color mapram access
};

/* constants for various config params */
#include <math.h>
#undef OVERFLOW /* get rid of global preproc define from math.h */
namespace UnitRam {
enum {
    MATCH = 1,
    ACTION = 2,
    STATISTICS = 3,
    METER = 4,
    STATEFUL = 5,
    TERNARY_INDIRECTION = 6,
    SELECTOR = 7,
    HASH_ACTION = 8,
};
namespace DataMux {
enum {
    STATISTICS = 0,
    METER = 1,
    OVERFLOW = 2,
    OVERFLOW2 = 3,
    ACTION = 4,
    NONE = 7,
};
}  // namespace DataMux
namespace AdrMux {
enum {
    ACTION = 1,
    TERNARY_INDIRECTION = 2,
    OVERFLOW = 4,
    STATS_METERS = 5,
    SELECTOR_ALU = 6,
    SELECTOR_OVERFLOW = 7,
    SELECTOR_ACTION_OVERFLOW = 8,
};
}  // namespace AdrMux
}  // namespace UnitRam
namespace AdrDist {
enum {
    ACTION = 0,
    STATISTICS = 1,
    METER = 2,
    OVERFLOW = 3,
};
}  // namespace AdrDist
namespace MapRam {
enum {
    STATISTICS = 1,
    METER = 2,
    STATEFUL = 3,
    IDLETIME = 4,
    COLOR = 5,
    SELECTOR_SIZE = 6,
};
namespace Mux {
enum {
    SYSTEM = 0,
    SYNTHETIC_TWO_PORT = 1,
    IDLETIME = 2,
    COLOR = 3,
};
}  // namespace Mux
namespace ColorBus {
enum {
    NONE = 0,
    COLOR = 1,
    OVERFLOW = 2,
    OVERFLOW_2 = 3,
};
}  // namespace ColorBus
}  // namespace MapRam
namespace BusHashGroup {
enum {
    SELECTOR_MOD = 0,
    METER_ADDRESS = 1,
    STATISTICS_ADDRESS = 2,
    ACTION_DATA_ADDRESS = 3,
    IMMEDIATE_DATA = 4,
};
}  // namespace BusHashGroup
namespace MoveReg {
enum {
    STATS = 0,
    METER = 1,
    IDLE = 2,
};
}  // namespace MoveReg
#endif /* BACKENDS_TOFINO_BF_ASM_CONSTANTS_H_ */
